Publications and Reports

2012 (Total 7)

  1. A. Madhavan and D.B. Strukov, “Mapping image and network processing tasks onto high-throughput CMOL FPGA circuits,” Proceedings of VLSI-SoC’12, Santa Cruz, CA, Oct. 2012.
  2. L. Gao, F. Alibart, and D.B. Strukov, “Analog-input analog-weight dot-product operation with Ag/a-Si/Pt memristive devices,” Proceedings of VLSI-SoC’12, Santa Cruz, CA, Oct. 2012.
  3. Yuchao Yang, Patrick Sheridan, and Wei Lu, “Complementary resistive switching in tantalum oxide-based resistive memory devices,” Applied Physics Letters 100, 203112, 2012.
  4. Siddharth Gaba, Shinhyun Choi, Patrick Sheridan, Ting Chang, Yuchao Yang and Wei Lu, “Improvement of RRAM Device Performance Through On-Chip Resistors,” MRS Symposium Proceedings Vol. 1430 DOI: 10.1557/opl.2012.1102, 2012.
  5. Amanda L. Tiano, Jingbin Li, Eli Sutter, S. Wong and M.V. Fernandez-Serra, “Effects of electronic correlation, physical structure, and surface termination on the electronic structure of V2O3 nanowires,” Physical Review B 86, 125135, 2012.
  6. Cheng, K-T., and D. Sturkov, “3D CMOS-Memristor Hybrid Circuits: Devices, Integration, Architecture, and Applications,” (Invited) IEEE International Symposium on Physical Design, 03/2012.
  7. N. Simonian and K. K. Likharev, “Design and simulation of molecular nonvolatile single-electron resistive switches,” API Journal of Applied Physics, 113, 044504 (2013); doi: 10.1063/1.4776717.

  8. 2013 (Total 20)

  9. J.J Yang, D.B. Strukov and D.R Stewart, “Memristive devices for computing,” Nature Nanotechnology, 8, pp. 13–24, 2013.
  10. L. Gao, F. Alibart, and D.B. Strukov, “Programmable CMOS/memristor threshold logic,” IEEE Transactions on Nanotechnology, 12, 2, 2013.
  11. A. Ghofrani, M. Lastras, and K-T. Cheng, “Towards Data Reliable Crossbar-Based Memristive Memories,” IEEE International Test Conference (ITC), Anaheim, CA, September 2013.
  12. F. Alibart, E. Zamanidoost, and D.B. Strukov, “Pattern Classification by Memristive Crossbar Circuits with Ex-Situ and In-Situ Training,” Nature Communications, 2013.
  13. F. Alibart and D.B. Strukov, “Utilizing NDR Effect to Reduce Switching Threshold Variations in Memristive Devices,” Applied Physics A 111, pp.199-202, 2013.
  14. L. Gao, F. Merrikh-Bayat, F. Alibart, X. Guo, B.D. Hoskins, K.-T. Cheng, and D.B. Strukov, “Digital-to-Analog and Analog-to-Digital Conversion with Metal Oxide Memristors for Ultra-Low Power Computing,” Proc. NanoArch’13, New York, NY, July 2013. (Best Concept Paper Award)
  15. L. Gao, F. Alibart, and D.B. Strukov, “A High Resolution Nonvolatile Analog Memory Ionic Devices,” Non-Volatile Memories Workshop, San Diego, CAMarch 2013.
  16. M. Lastras, A. Ghofrani, K.-T. Cheng, “Architecting Low Power Crossbar-Based Memristive RAM,” Non-Volatile Memories Workshop, San Diego, CAMarch 2013.
  17. S. Gaba, P. Sheridan, J. Zhou, S.H. Choi, W. Lu, “Stochastic Memristive Devices for Computing and Neuromorphic Applications,” Nanoscale, 5, pp. 5872, 2013.
  18. Y. Yang, S.H. Choi, W. Lu, “Oxide Heterostructure Resistive Memory,” Nano Letter, 13, pp. 2908−2915, 2013.
  19. J. Hermiz, T. Chang, C. Du, and W. Lu, “Interface and Memory Capacity Effects in Memristive Systems,” Applied Physics Letter, 102, 083106, 2013.
  20. Y. Yang and W. Lu, “Nanoscale Resistive Switching Devices: Mechanisms and Modeling,” Nanoscale, 5, pp. 10076-10092, 2013.
  21. H. Jiang and Qiangfei Xia, “Improvement of resistive switching uniformity for TiO2-based memristive devices by introducing a thin HfO2 layer,” J. Vac. Sci. Technol. B 31, 06FA04 (2013).doi: 10.1116/1.4831764.
  22. S. Pi, P. Lin and Qiangfei Xia, “Cross point arrays of 8 nm x 8 nm memristive devices fabricated with nanoimprint lithography,” J. Vac. Sci. Technol. B 31, 06FA02(2013).doi: 10.1116/1.4827021.
  23. C. Li, H. Jiang and Qiangfei Xia, “Low voltage resistive switching devices based on chemically produced silicon oxide,” Applied Physics Letters 103, 062104(2013). doi: 10.1063/1.4817970.
  24. P. Lin, S. Pi, H. Jiang and Qiangfei Xia, “Mold cleaning with polydimethylsiloxane for nanoimprint lithography,” Nanotechnology 24, 325301(2013).doi:10.1088/0957-4484/24/32/325301.
  25. H. Jiang and Qiangfei Xia, “Effect of voltage polarity and amplitude on electroforming of TiO2 based memristive devices,” Nanoscale 5, 3257-3261(2013). doi: 10.1039/C3NR00622K.
  26. Q. Xia, “Memristor Device Engineering and CMOS Integration for Reconfigurable Logic Applications,” In ‘Memristors and Memristive systems’ (eds: R. Tetzlaff). Springer, Germany, 2013. (Book Chapter)
  27. P. Sheridan and W. Lu, “Memristors and Memristive Devices for Neuromorphic Computing,” Memristor Networks, A. Adamatzky eds., Springer, 2013.
  28. Y. Yang, T. Chang and W. Lu, “Memristive Devices: Switching Effects, Modeling, and Applications,” Memristors and Memristive Systems, R. Tetzlaf eds., Springer, 2013.

  29. 2014 (Total 25)

  30. T. J. Walls and K. K. Likharev, “Self-Organization in Autonomous, Recurrent, Firing-Rate CrossNets with Quasi-Hebbian Plasticity,” IEEE Trans. on Neural Networks and Learning Systems 25, No. 4, pp. 819-824, Apr 2014.
  31. A. Rahimi, A. Ghofrani, M. Lastras, K-T. Cheng, R. Gupta, and L. Benini, “Energy-Efficient GPGPU Architectures via Collaborative Compilation and Memristive Memory-Based Computing,” Design Automation Conference (DAC), San Francisco, California, June 2014.
  32. P. Sheridan, W. Ma and W. Lu, “Pattern Recognition with Memristor Networks,” Proceedings of International Symposium on Circuits and Systems (ISCAS), pp. 1078-1081, Melbourne, Australia, Jun 2014.
  33. S. Gaba, P. Knag, Z. Zhang and W. Lu, “Memristive Devices for Stochastic Computing,” Proceedings of International Symposium on Circuits and Systems (ISCAS), pp. 2592-2595, Melbourne, Australia, Jun 2014.
  34. M. Laiho, E. Lehtonen, J. O. Hasler, J. Zhou, C. Du, W. Lu, J.H. Poikonen, “Analog signal processing on a FPAA/memristor hybrid circuit,” Proceedings of International Symposium on Circuits and Systems (ISCAS), pp. 2265-2268, Melbourne, Australia, Jun 2014.
  35. E. Mikheev, B. D. Hoskins, D. B. Strukov, and S. Stemmer, “Resistive switching and its suppression in Pt/Nb:SrTiO3 junctions,” Nature Communications, 5, Article number: 3990, Jun 2014.
  36. H. Jiang and Qiangfei Xia, “Single- and bi-layer memristive devices with tunable properties using TiOx switching layers deposited by reactive sputtering,” Applied Physics Letters 104, 153505, 2014. doi: 10.1063/1.4871709
  37. P. Lin, S. Pi and Qiangfei Xia, “3D integration of planar crossbar memristive devices with a CMOS substrate,” Nanotechnology 25, 405202, 2014. doi:10.1088/0957-4484/25/40/405202.
  38. H. Wang, X. Wang, F. Xia, L. Wang, H. Jiang, Qiangfei Xia, M. L. Chin, M. Dubey and S.-J. Han, “Black phosphorus radio-frequency transistors,” Nano Letters 14, 6424-6429, 2014. doi:10.1021/nl5029717
  39. S. Pi, P. Lin, H. Jiang, C. Li and Qiangfei Xia, “Device Engineering and CMOS Integration of Nanoscale Memristors,” Proceeding of the IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, Australia, Jun 2014. pp. 425 – 427. doi: 10.1109/ISCAS.2014.6865156
  40. H. Jiang, C. Li and Qiangfei Xia, “Switching Layer Engineering for Memristive Devices,” Proceeding of the 14th International Workshop on Cellular Nanoscale Networks and Their Applications (CNNA’14), Notre Dame, IN, July 2014. pp. 1-2. doi: 10.1109/CNNA.2014.6888616
  41. S. Choi, Y. Yang, and W. Lu, “Random telegraph noise and resistance switching analysis of oxide based resistive memory,” Nanoscale, 6, 400-404 (2014)
  42. S. Kim, S. Choi, and W. Lu, “Comprehensive Physical Model of Dynamic Resistive Switching in an Oxide Memristor,” ACS Nano, 8, 2369–2376 (2014)
  43. Y. Yang, J. Lee, S. Lee, C.-H. Liu, Z. Zhong, and W. Lu, “Oxide Resistive Memory with Functionalized Graphene as Built-in Selector Element,” Advanced Materials, 26, 3693–3699 (2014)
  44. P. Knag, W. Lu, and Z. Zhang, “A Native Stochastic Computing Architecture Enabled by Memristors,” IEEE Trans. Nanotechnol. 13 (2), 283-293 (2014)
  45. S. Gaba, P. Sheridan, C. Du, and W. Lu, “3-D Vertical Dual-Layer Oxide Memristive Devices,” IEEE Transactions On Electron Devices, 61 (7) 2581-2583, (2014)
  46. J. Zhou, K.-H. Kim, and W. Lu, “Crossbar RRAM Arrays: Selector Device Requirements During Read Operation,” IEEE Transactions On Electron Devices, 61 (5), 1369-1376 (2014)
  47. Y. Yang, P. Gao, L. Li, X. Pan, S. Tappertzhofen, S. Choi, R. Waser, I. Valov, and W. D. Lu, “Electrochemical dynamics of nanoscale metallic inclusions in dielectrics,” Nature Communications, 5, 4232 (2014)
  48. S. Kim, J. Zhou, and W. D. Lu, “Crossbar RRAM Arrays: Selector Device Requirements During Write Operation,” IEEE Transactions On Electron Devices, 61 (8), 2820-2826 (2014)
  49. S. Choi, J. Lee, S. Kim, W. D. Lu, “Retention failure analysis of metal-oxide based resistive memory,” Applied Physics Letters 105 (11), 113510 (2014)
  50. S. Kim, S. Choi, J. Lee, W. D. Lu, “Tuning Resistive Switching Characteristics of Tantalum-Oxide Memristors through Si Doping,” ACS Nano, 8, 10262-10269 (2014)
  51. S. Gaba, F. Cai, J. Zhou, and W. D. Lu, “Ultralow Sub-nA Operating Current Resistive Memory With Intrinsic Non-Linear Characteristics,” IEEE Electron Device Letters, 35(12), 1239-1241 (2014)
  52. Patrick Sheridan, Wei Lu, “Memristors and Memristive Devices for Neuromorphic Computing,” in Memristor Networks, Adam Adamatzky and Leon Chua eds. Springer, 2014
  53. F. Merrikh-Bayat, F. Alibart, L. Gao, and D.B. Strukov, “A reconfigurable FIR filter with memristor-based weights,” Proc. CAS-FEST (ISCAS) ’14, Melbourne, Australia, June 2014.
  54. M. Payvand, J .Rofeh, A. Sodhi, and L. Theogarajan, “A CMOS-memristive self-learning neural network for pattern classification applications,” IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Paris, France, July 2014.

  55. 2015 (Total 29)

  56. F. Merrikh Bayat, B. Hoskins, and D.B. Strukov, “Phenomenological modeling of memristive devices,” Applied Physics A, vol. 118(3), pp. 770-786, 2015.
  57. M. A. Lastras-Montaño, A. Ghofrani, and K.-T. Cheng, “Architecting Energy Efficient Crossbar-based Memristive Random Access Memories,” ACM/IEEE International Symposium on Nano-scale Architectures (NANOARCH), 2015.
  58. A. Ghofrani, A. Rahimi, M. A. Lastras-Montaño, L. Benini, R.K. Gupta, and K.-T. Cheng, “Associative Memristive Memory for Approximate Computing in GPUs,” accepted in IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Special Issue on Emerging Memories, 2015.
  59. A. Ghofrani, M. Lastras, S. Gaba, M. Payvand, W. Lu, L. Theogarajan, K.-T. Cheng, “A Low-Power Variation-Aware Adaptive Write Scheme for Access-Transistor-Free Memristive Memory,” ACM Journal on Emerging Technologies in Computing Systems (JETC), July 2015.
  60. M. Lastras, A. Ghofrani, K.-T. Cheng, “HReRAM, A Hybrid Reconfigurable Resistive Random Access Memory,” Design, Automation, and Test in Europe (DATE’15), Grenoble, France, March 2015.
  61. A. Rahimi, A. Ghofrani, K.-T. Cheng, L. Benini, R. Gupta, “Approximate Associative Memristive Memory for Energy-Efficient GPUs,” Design, Automation, and Test in Europe (DATE’15), Grenoble, France, March 2015.
  62. M. Prezioso, F. Merrikh-Bayat, B. Hoskins, G. Adam, K. K. Likharev, and D. B. Strukov, “Training and Operation of an Integrated Neuromorphic Network Based on Metal-Oxide Memristors,” accepted for publication in Nature, March 2015.
  63. A. Ghofrani, M. Lastras, K-T. Cheng, “Toward Large-Scale Access-Transistor-Free Memristive Crossbars,” Asia South Pacific Design Automation Conference (ASPDAC’15), Tokyo, Japan, Jan 2015.
  64. M. Payvand, A. Madhavan, M. Lastras, A. Ghofrani, J. Rofeh, K.-T. Cheng, D. Strukov, L. Theogarajan, “A Configurable CMOS Memory Platform for 3D Integrated Memristors,” accepted in IEEE International Symposium on Circuits and Systems (ISCAS’15), Lisbon, Portugal, May 2015.
  65. J. Rofeh, A. Sodhi, M. Payvand, M.A. Lastras-Montaño, A. Ghofrani, A. Madhavan, S. Yemenicioglu, K.-T. Cheng, and L. Theogarajan, “Vertical Integration of Memristors onto Foundry CMOS Dies using Wafer-Scale Integration,” IEEE Electronic Components and Technology Conference (ECTC), 2015.
  66. F. Merrikh Bayat, M. Prezioso, X. Guo, B. Hoskins, D.B. Strukov, and K.K. Likharev, “Memory technology for neural networks,” Proceedings of IMW’15, Monterey, CA, May 2015
  67. E. Zamanidoost, F. Merrikh Bayat, I. Kataeva, and D.B. Strukov, “Manhattan Rule training for memristive crossbar circuit pattern classifiers,” Proceedings of WISP’15, Siena, Italy, May 2015
  68. F. Merrikh Bayat, X. Guo, H. A. Om’mani, N. Do, K. K. Likharev, and D. B. Strukov, “Redesigning Commercial Floating-Gate Memory for Analog Computing Applications,” accepted in IEEE International Symposium on Circuits and Systems (ISCAS’15), Lisbon, Portugal, May 2015.
  69. G. M. Su, E. Lim, A. R. Jacobs, E. J. Kramer, and M. L. Chabinyc, “Polymer Side Chain Modification Alters Phase Separation in Ferroelectric-Semiconductor Polymer Blends for Organic Memory,” ACS Macro Lett., 3 (12), pp 1244–1248
  70. M. Wang, J. Zhou, Y. Yang, S. Gaba, M. Liu, and W.D. Lu, “Conduction mechanism of a TaO x-based selector and its application in crossbar memory arrays,” Nanoscale, 7, 4964–4970 (2015)
  71. S. Kim , C. Du , P. Sheridan , W. Ma , S. Choi , and W. D. Lu, “Experimental Demonstration of a Second-Order Memristor and Its Ability to Biorealistically Implement Synaptic Plasticity,” Nano Letters, in press (DOI: 10.1021/acs.nanolett.5b00697).
  72. E. Mikheev, J. Hwang, A. P. Kajdos, A. J. Hauser, and S. Stemmer, “Tailoring resistive switching in Pt/SrTiO3 junctions by stoichiometry control,” Scientific Reports 5, 11079 (2015)
  73. S. Pi, M. Ghadiri-Sadrabadi, J. C. Bardin and Qiangfei Xia, “Nanoscale Memristive Radiofrequency Switches,” Nature Communications , accepted (2015)
  74. Qiangfei Xia et al. “Nanoimprint lithography enables memristor crossbars and hybrid circuits,” Applied Physics A, 1-13 (2015) (Invited Review)
  75. M. Payvand and L. Theogarajan, “Exploiting Local Connectivity of CMOL Architecture for Highly Parallel Orientation Selective Neuromorphic Chips,” IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Boston, Massachusetts, USA, July 2015.
  76. Y. Yang, B. Chen, W. D. Lu, “Memristive Physically Evolving Networks Enabling Emulation of Heterosynaptic Plasticity,” Advanced Materials, Accepted (DOI: 10.1002/adma.201503202).
  77. C. Du, W. Ma, T. Chang, P. Sheridan, W. D. Lu, “Biorealistic Implementation of Synaptic Functions with Oxide Memristors through Internal Ionic Dynamics,” Advanced Functional Materials, 25, 4290–4299, (2015)
  78. S. Choi, P. Sheridan, W. D. Lu, “Data Clustering using Memristor Networks,” Scientific Reports, 5:10492 (2015).
  79. B.Chen, F. Cai, J. Zhou, W. Ma, P. Sheridan, and W. D. Lu, “Efficient in-memory computing architecture based on crossbar arrays,” IEEE International Electron Device Meeting (IEDM), 2015, accepted.
  80. G. M. Su, E. Lim, E. J. Kramer, and M. L. Chabinyc, “Phase Separated Morphology of Ferroelectric–Semiconductor Polymer Blends Probed by Synchrotron X-ray Methods,” Macromolecules, 2015, 48, 5861–5867.
  81. G. M. Su, S. Patel, C. D. Pemmaraju, E. J. Kramer, D. Prendergast, M. L. Chabinyc, “Predicting X-ray absorption spectra of semiconducting polymers for electronic structure and morphology characterization,” APS March Meeting 2015.
  82. E. Lim, G. M. Su, E. J. Kramer, M. L. Chabinyc, “Ferroelectric switching behavior in morphology controlled ferroelectric-semiconductor polymer blends for organic memory,” APS March Meeting 2015, San Antonio, TX.
  83. M. Prezioso, I. Kataeva, F. Merrikh-Bayat, B. Hoskins, G. Adam, T. Sota, K. Likharev, and D. Strukov, “Modeling and implementation of firing-rate neuromorphic-network classifiers with bilayer Pt/Al2O3/TiO2-x/Pt memristors,” accepted to IEDM’15, Dec. 2015.
  84. E. Zamanidoost, M. Klachko, I. Kataeva, and D.B. Strukov, “Low area overhead in-situ training approach for memristor-based classifier,” in: Proc. NanoArch’15, Boston, MA, July 2015, pp. 139-142.

  85. 2016 (Total 1)

  86. M. A. Lastras-Montaño, A. Ghofrani, and K.-T. Cheng, “A Low-Power Hybrid Reconfigurable Architecture For Resistive Random-Access Memories,” accepted in International Symposium on High-Performance Computer Architecture (HPCA), 2016.